the idt logo is a registered trademark of integrated device technology, inc. commercial temperature range january 1998 1998 integrated device technology, inc. 1 dsc-4246/- functional block diagram features: ? bus switches provide zero delay paths ? extended commercial range of C40c to +85c ? low switch on-resistance: fst3xxx C5 w fst32xxx C28 w ? ttl-compatible input and output levels ? esd >2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ? available in soic, qsop and tssop description: the fst3861 belongs to idts family of bus switches. bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink or source capability. they generate little or no noise of their own while providing a low resistance path for an external driver. these devices connect input and output ports through an n-channel fet. when the gate-to source junction of this fet is ad- equately forward-biased, the device conducts and the resis- tance between input and output ports is small. without ad- equate bias on the gate-to-source junction of the fet, the fet is turned off, therefore with no v cc applied, the device has not insertion capability. the low on-resistance and simplicity of the connection be- tween input and output ports reduces the delay in this path to close to zero. 10-bit, two port bus switch idt74fst3861 product preview integrated device technology, inc. pin description a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 b 0 oe b 1 b 2 b 3 b 4 b 5 b 6 b 7 b 8 b 9 pin names description oe output enable input (active low) a x a port bits b x b port bits pin configuration a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 gnd nc oe b 1 b 2 b 3 b 4 b 5 b 6 b 7 b 8 b 9 b 0 v cc so24-2 so24-8 so24-9 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 soic/qsop/tssop top view 4246 drw 02 4246 drw 01 4246 tbl 01
idt74fst3861 10-bit, two port bus switch commercial temperature range 2 absolute maximum ratings (1) capacitance (1) function table dc electrical characteristics over operating range following condition apply unless otherwise specified: commercial: t a = C40c to +85c, v cc = 5.0v 10% notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. v cc , control and switch terminals notes: 1. capacitance is characterized but not tested. 2. t a = 25c, f = 1mhz, v in = 0v, v out = 0v inputs oe outputs l connect a to b h disconnect a from b symbol parameter test conditions min. typ. (1) max. unit r on switch on resistance (2) v cc = min., v in = 0.0v 5 7 w i on = 48ma v cc = min., v in = 2.4v 10 15 i on = 15ma i os short circuit current, a to b (3) a(b) = 0v, b(a) = v cc 100 ma symbol parameter conditions (2) typ. unit c in control input capacitance 8 pf c i/o switch input/output capacitance switch off 13 pf symbol description max. unit v term (2) terminal voltage with respect to gnd C0.5 to +7.0 v t stg storage temperature C65 to +150 c i out maximum continuous channel current 128 ma symbol parameter test conditions min. typ. (1) max. unit v ih control input high voltage guaranteed logic high level 2.0 v v il control input low voltage guaranteed logic low level 0.8 v i ih control input high current v cc = max. v i = v cc 1a i il control input low current v i = gnd 1 i ozh current during v cc = max., v o = 0 to 5v 1 a i ozl bus switch disconnect 1 v ik clamp diode voltage v cc = min., i in = C18ma C0.7 C1.2 v i off switch power off leakage v cc = 0v, v in or v o 5.5v 1a i cc quiescent power supply current v cc = max., v in = gnd or v cc 0.1 3a bus switch impedance over operating range following condition apply unless otherwise specified: commercial: t a = C40c to +85c, v cc = 5.0v 10% notes: 1. typical values are at v cc = 5.0v, +25c ambient. 2. the voltage drop between the indicated ports divided by the current through the switch. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4246 tbl 02 4246 tbl 03 4246 tbl 04 4246 tbl 05 4246 tbl 06
idt74fst3861 10-bit, two port bus switch commercial temperature range 3 power supply characteristics symbol parameter test conditions (1) min. typ. (2) max. unit d i cc quiescent power supply current ttl inputs high v cc = max. v in = 3.4v (3) 0.51.5ma i ccd dynamic power supply current (4,5) v cc = max. outputs open v in = v cc v in = gnd 0.30.4ma/ mhz/ 1 enable pin toggling 50% duty cycle enable i c total power supply current (6) v cc = max. outputs open 1 enable pin toggling v in = v cc v in = gnd 3.04.0ma fi = 10mhz 50% duty cycle v in = 3.4 v in = gnd 3.34.8 notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. t a = C40c to +85c 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. switch inputs do not contribute to d i cc. 4. this parameter represents the current required to switch the internal capacitance of the control inputs at the specified freq uency. switch inputs generate no significant power supply currents as they transition. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. c pd = i ccd /v cc c pd = power dissipation capacitance 6. i c = i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f i n) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f i = control input frequency n = number of control inputs toggling at f i switching characteristics over operating range following condition apply unless otherwise specified: commercial: t a = C40c to +85c, v cc = 5.0v 10% symbol description (1) min. typ. max. unit t plh t phl data propagation delay a to b, b to a (2) 0.25 ns t pzh t pzl switch connect delay oe to a or b 1.5 6.5 ns t phz t plz switch disconnect delay oe to a or b 1.5 5.5 ns |q ci | charge injection during switch disconnect oe to a or b (3) 1.5pc notes: 1. see test circuits and waveforms. 2. the bus switch contributes no propagation delay other than the rc delay of the load interacting with the rc of the switch. 3. |q ci | is the charge injection for a single switch disconnect and applies to either single switches or multiplexers. |q dci | is the charge injection for a multiplexer as the multiplexed port switches from one path to another. charge injection is reduced because the injection from the disconnect of the first path is compensated by the connect of the second path. 4246 tbl 07 4246 tbl 08
idt74fst3861 10-bit, two port bus switch commercial temperature range 4 v cc pulse generator d.u.t. 7.0v 500 w 500 w 50pf c l r t v in v out v out (3) switch out (1) enable/select c l = 50pf v cc 1mhz signal generator switch in switch in (mux) (2) d.u.t. same phase input transition opposite phase input transition 3v 1.5v 0v 3v 1.5v 0v v oh 1.5v v ol t plh t phl t phl t plh output data input 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v t rem timing input asynchronous control synchronous control t su t h t su t h control input t plz 3v 1.5v 0v output normally low 3.5v t pzl t pzh 0v 1.5v 1.5v switch closed output normally high enable disable switch open 3.5v t phz 0v v o l v oh 0.3v 0.3v low-high-low pulse high-low-high pulse 1.5v 1.5v t w test circuits and waveforms test circuits for all outputs switch position charge injection pulse width enable and disable times propagation delay set-up, hold and release times notes: 1. select is used with multiplexers for measuring |q dci | during multiplexer select. during all other tests enable is used. 2. used with multiplexers to measure |q dci | only. 3. charge injection = d v out c l , with enable toggling for |q ci | or select toggling for |q dci |. d v out is the change in v out and is measured with a 10m w probe. definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator notes: 1. diagram shown for input control enable-low and input control disable high 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns test switch open drain disable low enable low closed all other tests open 4246 lnk 09 4246 drw 03 4246 drw 06 4246 drw 04 4246 drw 05 4246 drw 07 4246 drw 08
idt74fst3861 10-bit, two port bus switch commercial temperature range 5 ordering information idt xx fst xxxx x package device type temp. range so q pg 3861 74 small outline ic (so24-2) quarter-size small outline package (so24-8) thin shrink small outline package (so24-9) 10-bit flow through switch C40c to +85c 4246 drw 09
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